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 SSC2117
750mA CMOS
Elektronische Bauelemente
RoHS Compliant Product
Positive Voltage Regulator
Description
The SSC2117 positive,linear regulators feature low quiescent current (45A typ.) with low dropout voltage, making them ideal for battery applications. Output voltage are set at the factory and trimmed to 1.5% accuracy.These rugged devices have both Thermal Shutdown and Current Fold-back to prevent device failure under the "Worst" of operating conditions.The SSC2117 is stable with an output capacitance of 4.7F or greater.
Features
* Low Temperature Coefficient * Over-Temperature Shutdown
* Adjustable Version * Very Low Dropout Voltage * Noise Reduction Bypass Capacitor * Short Circuit Current Fold-back * Guaranteed 750mA output * Current Limiting * Power-Saving Shutdown Mode
REF. A B C D E F
Min.
Millimeter
Max.
6.20 5.00 4.00 8 C 0.90 0.25
REF. M H L J K G
Min.
Millimeter
Max.
5.80 4.80 3.80 0C 0.40 0.19
0.10 0.25 0.35 0.49 1.35 1.75 0.375 REF. 45 C 1.27 TYP.
Applications
* PC Peripherals * Wireless Devices
* Portable Electronics * Battery Powered Widgets * Instrumentation
Functional Block Diagram
Typical Application Circuit
SSC2117
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Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 1 of 7
SSC2117
Elektronische Bauelemente
750mA CMOS Positive Voltage Regulator
Absolute Maximum Ratings
Parameter
Input Voltage Output Current Output Voltage Operating Ambient Temperature Junction Temperature Max. Junction Temperature Power Dissipation ( EDS Classification
o
Symbol
VIN IOUT VOUT Topr Tj Tj Max. PD
Ratings
8
PD/(VIN-VO) Gnd-0.3 to VIN+0.3 -40~+85 -40~+125 150 810
Unit
V mA
o o
V
C C
T=100 C)
o
C mW
o
B
Electrical Characteristics Ta=25 C unless otherwise noted (VIN=VOUT(T)+2V,VEN=VIN,CIN=1uF,COUT=4.7uF)
Parameter
Output Voltage Output Current Current Limit Load Regulation Dropout Voltage Quiescent Current Line Regulation
Symbol
VOUT (E) IO ILIM
REGLOAD
1
Min.
-1.5% 750 750 -1
_ _ _ _
Typ.
VOUT (T)
_ _
2
Max.
1.5%
_ _
Unit
V
mA mA
Condition
VIN=VOUT(T)+2V,1o=1mA
VO>1.2V VO>1.2V
0.2
_ _ _
1 1000 650 500 70 0.15 0.1 0.4 7
_
_ _ _ _ _ _ _
%
mV uA % V
o o
VIN=VOUT(T)+2V,Io=1mA~ 750mA VOUT(T)=1.5V VOUT(T)=1.8V VOUT(T) 2.0V Io=750mA Vo=VOUT(E)-2%
VDROPOUT IQ REGLINE VIN OTS OTH TC ISC PSRR
45
_
-0.15 -0.1 -0.4 Input Voltage Over Temperature Shutdown Over Temperature Hystersis Output Voltage Temperature Coefficient Short Circuit Current Power Supply Rejection
Note
_ _ _ _ _ _ _
3
0.02
_
_
VIN=VOUT(T)+2V,Io=0mA Io=1mA VOUT(T)< 2.0V VIN=VOUT(T)+ 1 2.0V VOUT(T)<4.0V to VOUT(T)+2 4.0V VOUT(T)
150 30 30 750 75 55 30 30
_ _ _ _
C C
o
ppm/ C mA dB VIN=VOUT(T)+1V,VO<0.4V f=1kHz f=10kHz f=100Hz uVrms V uA uA uA uA V VIN=2.5V Io=100mA Co=4.7uF (ceramic)
Output Voltage Noise EN Input Threshold EN Input Bias Current Shutdown Supply Current ADJ Input Bias Current Min. Load Current ADJ Reference Voltage
certain IOUT value). 2: VOUT (T) =Specified Output Voltage 3: VIN (MIN) =VOUT+VDROPOUT
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eN VEH VEL IEH IEL ISD IADJ ILOAD VREF
_
f=10Hz~100kHz, Io=10mA CO=4.7uF VIN=2.7V to 7V VEN=VIN,VIN=2.7V to 7V VEN=0V,VIN=2.7V to 7V VIN=5V,Vo=0V,VEN2
_ _ _ _ _
VIN
0
0.4 1 1 2
_
0.5 1
_
70 1.260
1.221
1.240
Note 1: VOUT (E) =Effective Output Voltage (i.e. the output voltage when "VOUT (T) +2.0V" is provided at the VIN pin while maintaining a
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 2 of 7
SSC2117
Elektronische Bauelemente
750mA CMOS Positive Voltage Regulator
Ordering Information(contd.)
Part Number
SSC2117-AD
Marking
7AAD2 XXXX
Output Voltage
Adjustable
Part Number
Marking
Output Voltage
Detailed Description
The SSC2117 of COMS regulators contain a PMOS pass transistor,voltage reference, error amplifier,over-current protection and thermal shutdown.The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal protection circuits. During normal operation, the error amplifier compares the output voltage to a precision reference. Over-current and Thermal shutdown circuits o become active when the junction temperature exceeds140 C, or the current exceeds 2.2A. During thermal shutdown, the output voltage remains low. Normal operation is restored when the junction temperature drops below 120oC.The SSC2117 behaves like a current source when the load reaches 2.2A. However, if the load impedance drops below 0.3ohms, the current drops back to 600mA to prevent excessive power dissipation. Normal operation is restored when the load resistance exceeds of 0.75ohms.
External Capacitors
The SSC2117 is stable with an output capacitance to ground of 4.7uF or greater. Ceramic capacitors have the lowest ESR, and will offer the best AC performance. Conversely, Aluminum Electrolytic capacitors exhibit the highest ESR, resulting in the poorest AC response. Unfortunately, large value ceramic capacitors are comparatively expensive. One option is to parallel a 0.1uF ceramic capacitor with a 10uF Aluminum Electrolytic. The benefit is low ESR, high capacitance, and low overall cost. A second capacitor is recommended between the input and ground to stabilize VIN. The input capacitor should be at least 0.1uF to have a beneficial
effect. All capacitors should be placed in closed proximity to the pins. A "Quiet" ground termination is desirable. This can be achieved with a "Star" connection.
Enable
When EN pin is pulled low, the PMOS pass transistor shuts off, and all internal circuits are powered down. In this state, the quiescent current is less than 2uA. This pin behaves much like an electronic switch. 100K[ resistor is necessary between VEN source and EN
pin when VEN is high than VIN. (Note: There is no internal pull-up for EN pin. It can not be floating.)
Adjustable Version
The adjustable version uses external feedback resistors to generate an output voltage anywhere from 1.5V to 5.0V. Vadj is trimmed to 1.24V and Vout is given by the equation: VOUT=Vadj*(1+R1/R2) Feedback resistors R1 and R2 should be high enough to keep quiescent current low, but increasing R1+R2 will reduce stability. In general, R1 and R2 in the 10's of k [ will produce adequate stability, given reasonable layout precautions. To improve stability characteristics,
keep parasitic on the ADJ pin to min., and lower R1 and R2 values.
ht tp://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 3 of 7
SSC2117
Elektronische Bauelemente
750mA CMOS Positive Voltage Regulator
Characteristics Curve
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Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 4 of 7
SSC2117
Elektronische Bauelemente
750mA CMOS Positive Voltage Regulator
http://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 5 of 7
SSC2117
Elektronische Bauelemente
750mA CMOS Positive Voltage Regulator
ht tp://www.SeCoSGmbH.com/
Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 6 of 7
SSC2117
Elektronische Bauelemente
750mA CMOS Positive Voltage Regulator
External Resistor Divider Table
R1(k[ ) VOUT
1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 2.00 2.05 2.10 2.15 2.20 2.25 2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.70 2.75 2.80 2.85 2.90 2.95 3.00 3.05 3.10 3.15
1
20.67 11.27 7.75 5.90 4.77 4.00 3.44 3.02 2.7 2.43 2.21 2.03 1.88 1.75 1.63 1.53 1.44 1.36 1.29 1.23 1.17 1.12 1.07 1.02 0.98 0.95 0.91 0.88 0.85 0.82 0.79 0.77 0.75 0.73 0.70 0.69 0.67 0.65
2
41.33 22.55 15.50 11.81 9.54 8.00 6.89 6.05 5.39 4.86 4.43 4.07 3.76 3.49 3.26 3.06 2.88 2.73 2.58 2.46 2.34 2.23 2.14 2.05 1.97 1.89 1.82 1.76 1.70 1.64 1.59 1.54 1.49 1.45 1.41 1.37 1.33 1.30
5
103.33 56.36 38.75 29.52 23.85 20.00 17.22 15.12 13.48 12.16 11.07 10.16 9.39 8.73 8.16 7.65 7.21 6.81 6.46 6.14 5.85 5.59 5.34 5.12 4.92 4.73 4.56 4.40 4.25 4.11 3.97 3.85 3.73 3.63 3.52 3.43 3.33 3.25
10
206.67 112.73 77.50 59.05 47.69 40.00 34.44 30.24 26.96 24.31 22.14 20.33 18.79 17.46 16.32 15.31 14.42 13.63 12.92 12.28 11.70 11.17 10.69 10.25 9.84 9.47 9.12 8.79 8.49 8.21 7.95 7.70 7.47 7.25 7.05 6.85 6.67 6.49
20
413.33 225.45 155.00 118.10 95.38 80.00 68.89 60.49 53.91 48.63 44.29 40.66 37.58 34.93 32.63 30.62 28.84 27.25 25.83 24.55 23.40 23.34 21.38 20.50 19.68 18.93 18.24 17.59 16.99 16.42 15.90 15.40 14.94 14.50 14.09 13.70 13.33 12.98
R2(k [ )=(1.24*R1(k [ ))/(VOUT-1.24)
R1(k [) VOUT
3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60 3.65 3.70 3.75 3.80 3.85 3.90 3.95 4.00 4.05 4.10 4.15 4.20 4.25 4.30 4.35 4.40 4.45 4.50 4.55 4.60 4.65 4.70 4.75 4.80 4.85 4.90 4.95 5.00
1
0.63 0.62 0.60 0.59 0.57 0.56 0.55 0.54 0.53 0.51 0.50 0.49 0.48 0.48 0.47 0.46 0.45 0.44 0.43 0.43 0.42 0.41 0.41 0.40 0.39 0.39 0.38 0.37 0.37 0.36 0.36 0.35 0.35 0.34 0.34 0.33 0.33
2
1.27 1.23 1.20 1.18 1.15 1.12 1.10 1.07 1.05 1.03 1.01 0.99 0.97 0.95 0.93 0.92 0.90 0.88 0.87 0.85 0.84 0.82 0.81 0.80 0.78 0.77 0.76 0.75 0.74 0.73 0.72 0.71 0.70 0.69 0.68 0.67 0.66
5
3.16 3.08 3.01 2.94 2.87 2.81 2.74 2.68 2.63 2.57 2.52 2.47 2.42 2.38 2.33 2.29 2.25 2.21 2.17 2.13 2.09 2.06 2.03 1.99 1.96 1.93 1.90 1.87 1.85 1.82 1.79 1.77 1.74 1.72 1.69 1.67 1.65
10
6.33 6.17 6.02 5.88 5.74 5.61 5.49 5.37 5.25 5.15 5.04 4.94 4.84 4.75 4.66 4.58 4.49 4.41 4.34 4.26 4.19 4.12 4.05 3.99 3.92 3.86 3.80 3.75 3.69 3.64 3.58 3.53 3.48 3.43 3.39 3.34 3.30
20
12.65 12.34 12.04 11.75 11.48 11.22 10.97 10.74 10.51 10.29 10.08 9.88 9.69 9.50 9.32 9.15 8.99 8.83 8.67 8.52 8.38 8.24 8.10 7.97 7.85 7.73 7.61 7.49 7.38 7.27 7.17 7.07 6.97 6.87 6.78 6.68 6.60
R2(k [ )=(1.242*R1(k [ ))/(VOUT-1.242)
Note: Small load (greater than 2mA) is necessary as R1 or R2 is larger than 50k[ . Otherwise, output voltage probably can not be pulled down to 0V on disable mode.
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Any changing of specification will not be informed individual
01-Jun-2002 Rev. A
Page 7of 7


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